Memory devices are typically provided as internal, semiconductor, integrated circuits in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Flash memory devices have developed into a popular source of non-volatile memory for a wide range of electronic applications. Non-volatile memory is memory that can retain its stored data for some extended period without the application of power. Common uses for flash memory and other non-volatile memory include personal computers, personal digital assistants (PDAs), digital cameras, digital media players, digital recorders, games, appliances, vehicles, wireless devices, mobile telephones and removable memory modules, and the uses for non-volatile memory continue to expand.
Flash memory typically utilizes one of two basic architectures known as NOR Flash and NAND Flash. For example, a NAND flash memory device is a common type of flash memory device, so called for the logical form in which the basic memory cell configuration is arranged and accessed. Typically, the array of memory cells for NAND flash memory devices is arranged such that memory cells are coupled together in series (e.g., coupled source to drain) to form strings of memory cells. Changes in threshold voltage of the memory cells, through programming (which is sometimes referred to as writing) of charge storage structures (e.g., floating gates or charge traps) or other physical phenomena (e.g., phase change or polarization), determine the data value of each cell.
Two examples of architectures for programming (e.g., writing) and/or sensing (e.g., reading) memory cells of an array are shielded data line (e.g., shielded bit line) and non-shielded data line (e.g., non-shielded bit line) architectures. In a shielded bit line architecture, memory cells coupled to odd numbered (e.g., alternating) bit lines may be programmed while the adjacent even numbered (e.g., alternating) bit lines are inhibited. During a subsequent programming operation, the odd numbered bit lines may be inhibited while memory cells coupled to the even numbered bit lines are programmed. Thus, the inhibited bit lines facilitate a shielding effect on the strings of memory cells which are being programmed. Sense operations in shielded bit line architecture devices are also performed by sensing alternating selected bit lines while inhibiting unselected alternating bit lines. In non-shielded bit line architectures, commonly referred to as all bit line (ABL) architectures, memory cells coupled to all bit lines may be programmed and sensed concurrently.
One technique used to increase the memory capacity of a NAND memory device is to form the memory array in a three dimensional (3D) manner. In other words, instead of the series memory strings being formed horizontally on a memory die which is typically referred to as 2D memory, the series strings are formed vertically on a substrate.
Memory cells, such as flash memory cells, may be configured as what are known in the art as Single Level Memory Cells (SLC) or Multilevel Memory Cells (MLC). SLC and MLC memory cells assign a data state (e.g., representing a respective value of one or more bits) to a specific range of threshold voltages (Vt) stored on the memory cells. Single level memory cells (SLC) permit the storage of a single binary digit (e.g., bit) of data on each memory cell. Meanwhile, MLC technology permits the storage of two or more binary digits per cell (e.g., 2, 3, 4, 5 bits), depending on the quantity of Vt ranges assigned to the cell and the stability of the assigned Vt ranges during the lifetime operation of the memory cell. By way of example, one bit (e.g., 1 or 0) may be represented by two Vt ranges, two bits by four ranges, three bits by eight ranges, etc. Memory cells programmed to store two bits might be referred to as MLC(four-level), as the two bits might be represented by four Vt ranges which might be stored in the memory cells. Memory cells programmed to store three bits might be referred to as MLC(eight-level), as three bits might be represented by eight Vt ranges which might be stored in the memory cells, and so on.
While memory cells programmed as MLC memory cells are able to store more bits of data per cell than SLC memory cells, MLC memory cells typically have lower reliability characteristics than SLC memory. ABL memory devices are typically programmed wherein all of the memory cells are programmed as SLC or at the same level of MLC levels, for example. Thus, a trade-off generally exists between storing more data in an array of memory cells and an expected reliability level associated with the data stored at a particular MLC level in the array of memory cells.
A typically undesirable effect which can occur when programming memory cells is referred to as program disturb. A programming operation performed on a particular memory cell might disturb a programmed data state of one or more nearby (e.g., adjacent) memory cells. This can corrupt data stored in these nearby memory cells. These disturb effects tend to increase as the MLC level increases, such as from programming memory cells as MLC(two-level) to programming memory cells as MLC(three-level), for example.
For the reasons stated above, and for other reasons stated below which will become apparent to those skilled in the art upon reading and understanding the present specification, there is a need in the art for alternative methods of operating all bit line memory devices.